Qualectron - Test Fixtures Overview

Boundary Scan

Development and Testing Service

We provide Boundary Scan Development and Testing Service and Flash / CPLD / FPGA programming service to customers. In our facility, we equip with JTAG Provision development and test station and eMTestExpert / Fabmaster for Boundary Scan application development and testing..

Service provided:

Boundary Scan Test Service

Integrated Boundary Scan and ICT Test Service

Flash / CPLD / FPGA In System Programming Service

Application Development Service for JTAG Technologies

Application Development Service of Flash / CPLD / FPGA In System Programming for JTAG Technologies

Design for Test (DFT) Service
Test Fixture Development and Manufacture

Material Requirements for boundary scan test development

Schematic

BOM

CAD data (supported platforms are listed below)

Make sure that whenever alphanumeric pin names are used they are listed in the cad data.

BSDL files

Provide BSDL files for all the devices used on the board

Provide the post config BSDL file if the device (ex:cpld) is programmed on the board. If the post config BSDL file is not available, provide the design file (ex:design.pnx) to convert a BSDL file to post config version.

If Flash / CPLD / FPGA programming is required, provide programming file (*.svf, *.jed …etc.)

Gerber files (Optional)

FabMaster files (Optional)

Power requirements

Voltage and current requirement

Procedure to power up the board

Known good loaded board

CAD Supported Platforms

Platform	Netlist Input	Additional Input
Allegro	.net	-
Board Station	.net or .nf	-
Cadence	.net or .dat	partlist (.parts or .dat) pinlist (.pins or .dat)
Cades-G	no default	-
Cadif 4.0	.paf	-
Cadstar	.net	-
CONCISE	.net or .dat	-
DxDesigner	.net	package
Eagle	.net or .ntl	partlist (.ptl)
EDIF 2 0 0	.edf or .net	-
Fabmaster	.asc or .txt or .net	partlist (.txt or .par)
Futurenet	.net
Gencad 1.4	.cad or .net	-
HP3070 Board Configuration	no default	-
Keyin	.net or .kyn or .txt	.txt
Mentor Graphics	.net	complist (.cmp or .comps or .txt) pinlist (.pins or .pin or .txt)
Mentor Neutral File	.naf or .net or .neu	-
Mentor Report Writer MDC	.mdb or .mdc	-
Mentor	.net	(.txt)
ODB++	Archive file	-
Orcad (=EDIF 2 0 0)	.edf or .net	-
Pads	.pad or .net or .asc	-
Pcad	.net	-
Protel 2.0	.net	-
Protel99 1.1	.net	-
RINF	See Zuken Redac
SFX	.npl	-
Supermax E-CAD Wirelist	.iwl	-
Synario 3.00	.net	-
Tango	.net	-
Telesis	.net	-
Teradyne Victory	.cds	-
Theda	See Zuken (Theda)	-
Ulticap	.net	partlist (.plc)
Unicad	.nf	-
Veribest	.net	.txt
Verilog	no default	-
ViewLogic	.net	package
Zuken CR5000	.ndf	complist (.ruf)
Zuken Redac (Rinf)	.frs or .net	-
Zuken_CCF	.ccf	-
Zuken (Theda)	.net

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